While the Tualatin requires a new socket format, it represents the most overclockable Pentium III design to date. Many users report overclocks upwards of 2 GHz with radical cooling. Traditional forced-air heatsink cooling techniques usually peak between 1400 and 1600 MHz. Unlike previous designs, the new .13-micron architecture is not tolerant of changes in core voltages. Take great care when pushing the safety limit of 10% beyond default specifications.
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Processor Family |
Model Name |
Intel Talatin |
---|---|---|
|
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Performance Rating |
1130 – 1260+ MHz |
|
Generation |
Sixth: 80686 IA-32 |
|
Operational Rates |
Level 1 Cache Speed |
1.0× Core Rate |
Level 2 Cache Speed |
1.0× Core Rate |
|
Front-side Bus Speed |
100 – 133 MHz |
|
Multiplier Ratio |
8.5× – 13+x |
|
Physical Design |
Interface Packing |
370-Pin FCPGA2 Socket |
Core Die Size |
.13 micron |
|
Core Size by Stepping |
80 mm2 |
|
Transistor Count |
256 KB = 28.1 Million |
|
512 KB = 44 Million |
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Voltage Interface |
Split Core and I/O |
|
Core Voltage |
1.45 – 1.475 volts |
|
I/O Voltage |
3.3 volts |
|
Level 2 Cache Voltage |
3.3 volts |
|
Power Consumption |
15 – 21 watts |
|
Maximum Power |
12.8 – 31.2 watts |
|
Core Technology |
OOO and Speculative Execution RISC |
|
Register Support |
Integer = 32 bit |
|
FPU = 80 bit |
||
MMX = 64 bit |
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SSE = 128 bit |
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Execution Units |
2 × ALU/MMX/SSE |
|
1 × Pipelined FPU |
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Maximum Execution Rate |
5 Micro-Ops per Cycle |
|
Data Bus Width |
64 bit |
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Maximum Memory Support |
Physical = 64 Gigabyte |
|
Virtual = 64 Terabyte |
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Multi-Processor Support |
2-way SMP via APIC |
|
Level 1 Code Cache |
16 KB 4-way |
|
Level 1 Data Cache |
16 KB 4-way |
|
Level 2 Cache |
256 – 512 KB Unified |
|
Read Buffer |
4 × 32 Byte |
|
Write Buffer |
32 Byte |
|
Pre-fetch Queue |
32 Byte |
|
Static Branch Prediction |
Supported |
|
Dynamic Branch Prediction |
512 Entry 4-way |
|
RSB Branch Prediction |
4 Entry |
|
Floating-Point Processor |
Integrated |
|
Multimedia Extensions |
MMX, SSE |
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