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VIA Technologies, a Taiwan-based computing giant, acquired the aging Cyrix processing platform in June 1999. In the same time-frame, the company bought rights to the Centaur WinChip architecture, allowing it to enter the processor design business. While VIA is now actively developing processing platforms, it still relies on outside resources to produce its models.
Many computer users have never heard of a VIA processor. This lack of visibility can best be attributed to poor marketing, though the quality of the processors has also been in question. The original VIA Cyrix III processor never shipped to market; its architecture simply could not compete with similarly priced offerings from Intel and AMD.
In acquiring Centaur, VIA moved to redesign its failed chip. The Centaur design team had posted moderate success with WinChip; VIA was hoping to leverage that success into a viable processor design. The VIA Cyrix III, called Samuel, was derived from Centaur; it shared little technology with any earlier Cyrix design. The Samuel was underpowered, but it did establish VIA's presence in the microprocessor market.
The current VIA processing platform is called C3, a name derived from Cyrix III but shortened to neutralize the stigma associated with earlier Cyrix models. The VIA C3 is essentially a fifth-generation 80586 core architecture, with extensions for compatibility with MMX and 3DNow! instruction sets. 3DNow! support is a real blessing, as the base floating-point unit of the C3 leaves much to be desired. The C3 fairs slightly better in desktop applications; it usually performs within a few percentage points of the popular Intel Celeron II for most integer-based calculations. Comparing the C3 against the AMD Duron is pointless; the entry-level Duron often outperforms even the powerful Pentium III.
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Processor Family |
Model Name |
VIA C3 |
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Performance Rating |
733 – 933+ MHz |
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Generation |
Fifth: 80586 IA-32 |
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Operational Rates |
Level 1 Cache Speed |
1.0x Core Rate |
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Level 2 Cache Speed |
1.0x Core Rate |
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Front-side Bus Speed |
100 – 133 MHz |
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Multiplier Ratio |
4.5x – 8.0+x |
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Physical Design |
Interface Packing |
370 Pin Socket |
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Core Die Size |
.15 micron, 52 mm2 |
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.13 micron, 52 mm2 |
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Transistor Count |
15.8 Million |
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Voltage Interface |
Split Core and I/O |
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Core Voltage |
.15 micron: 1.6 volts |
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.13 micron: 1.35 volts |
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3.3 volts |
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Power Consumption |
6.8 – 10.6 watts |
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Maximum Power |
9.6 – 17.7 watts |
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Architectural Design |
Core Technology |
In-order and Pipelined Execution RISC |
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Register Support |
Integer = 32 bit |
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Floating-Point = 80 bit |
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MM = 64 bit |
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Execution Units |
1x Integer |
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1x FPU (1/2 Speed) |
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Data Bus Width |
64 bit |
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Max Memory Support |
Physical = 4 Gigabyte |
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Virtual = 64 Terabyte |
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Multi-Processor Support |
Not Supported |
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Level 1 Code Cache |
64 KB 4-way |
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Level 1 Data Cache |
64 KB 4-way |
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Level 2 Cache |
64 KB Exclusive |
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Pre-fetch Queue |
3x 16 Byte |
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Static Branch Prediction |
Supported |
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Dynamic Branch Prediction |
128 Entry |
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RSB Branch Prediction |
16 Entry |
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Floating-Point Processor |
Integrated |
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Multimedia Extensions |
MMX, 3DNow! |
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